The present invention relates to low noise amplifiers for use, for example, in radio frequency receivers.
Radio receivers typically receive a radio frequency (RF) signal, for example, via an antenna. The received RF signal is typically amplified and then sent to a mixer where the frequency is downconverted via a mixer to a lower frequency that is easier to process by the receiver. The amplifier should raise the level of the RF input signal above the equivalent input noise of the mixer so that an adequate signal to noise ratio is maintained. If, on the other is hand, the input signal is already of sufficiently high level, the amplifier should be switchable to a lower gain in order to relax the linearity requirements of the mixer.
RF amplification is commonly used in communication systems, such as in cellular communications and cordless telephony. For example, a handset receives a RF signal via an antenna, which is amplified before it is downconverted to an intermediate frequency (IF) signal via a mixer. It is important that the amplifier be low noise so that it does not significantly degrade or mask the information contained in the original RF signal. It is also important, particularly for cellular handsets, that the amplifier consumes low power. In addition, particularly for cellular handset applications, it is desirable that the amplifier has switchable gain. This is important because the RF signal received by the handset may be weak or strong, depending upon the location of the handset. For example, if the handset is at the edge of a cell, the RF signal it receives may be weak, requiring high amplification. In such situations, it is also important that a low noise amplifier is used to amplify the weak, low-power RF signal in order to distinguish the important information from surrounding low-level noise. On the other hand, if the handset is close to the center of a cell, the RF signal it receives may be strong, requiring little, if any, amplification. Moreover, any amplifier should be easy to manufacture, preferably as an integrated circuit.
Amplification techniques used to date, however, have shortcomings in performance and/or in implementation as an integrated circuit. For example, a conventional switched gain RF amplifier is shown in FIG. 1.
Here, a control voltage VCTL is used to switch the amplifier 10 between high gain and low gain modes. As explained further below, when the amplifier 10 is switched to low gain (VCTL low), FETs 14 and 16 provide a non-amplified bypass route for the RF signal. When the amplifier 10 is switched to high gain (VCTL high), cascaded FETs 18 and 19 provide amplification.
More particularly, VCTL is coupled to the base of npn transistor 12 and to the sources of FETs 14 and 16. The gates of FETs 14 and 16 are grounded. The drain of FET 14 is coupled to the RF input, and the drain of FET 16 is coupled to the RF output.
The emitter of transistor 12 is grounded and the collector of transistor 12 is coupled to the sources of amplification FETs 18 and 19. The gate of FET 18 is coupled to the RF input and the drain of FET 18 is coupled to the gate of FET 19. The drain of FET 19 is coupled to the RF output.
When VCTL is high, the amplifier is in high gain mode. More particularly, a high VCTL biases transistor 12 on, which provides a ground for the sources of amplification FETs 18 and 19, allowing them to amplify the RF input signal. Meanwhile, the sources of by bypass FETs 14 and 16 are high, turning them off. Nevertheless, even when off, bypass FETs 14 and 16 provide a capacitive feedback path from the RF output to the RF input. To lower the feedback capacitance, the circuit of FIG. 1 typically requires high-cost gallium arsenide FET implementation.
When VCTL is low, the amplifier is in low gain mode. The low signal biases bypass FETs 14 and 16 on, creating a no-gain bypass path from the RF input to the RF output through FETs 14 and 16. Meanwhile, transistor 12 is biased off, which biases FETs 18 and 19 off.
In the low gain state, the gain value of the amplifier of FIG. 1 is determined by the insertion loss of the bypass FETs 14 and 16 and other input circuitry. Thus, the gain is necessarily less than 0 dB, and the amplifier of FIG. 1 is not capable of producing a low gain greater than 0 dB or multiple stepped gains. Also, in the low gain mode, this amplifier has strict linearity requirements, which would typically require high cost gallium arsenide FET implementation.
Consequently, there is a need for a low noise amplifier that can be easily and inexpensively manufactured, for example, with low cost silicon bipolar technology. There is also a need for a low noise amplifier that, if desired, has a low gain state and, in some situations, more than two gain steps (e.g., high, low and intermediate).